Qualcomm is conducting an interview for the post of DFT Engineer.
Bachelor’s degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
- Master’s degree in Computer Science, Engineering, Information Systems, or related field.
- 1+ year of experience with circuit design (e.g., digital, analog, RF).
- 1+ year of experience utilizing schematic capture and circuit simulation software.
- 1+ year of experience with hardware design and measurement instruments such as oscilloscopes, spectrum analyzers, RF tools, etc.
- Minimum of 2+ years experience in the area of ASIC/DFT
- In depth knowledge of DFT concepts
- In depth knowledge and hands on experience in scan insertion, ATPG, coverage analysis, Transition delay test coverage analysis
- Expertise in test mode timing constraints definition, knowledge in providing timing fixes/corrective actions for timing violations
- Expertise in scripting languages such as perl, shell, etc.
- Experience in simulating test vectors
- Knowledge of equivalence check, DFT DRC rules both in RTL lint tool (like spyglass) and ATPG tool like (TK, TetraMax)
- Working experience in Synopsis TetraMax/DFTMax and Cadence Encounter Test is a plus
- Ability to work in an international team, dynamic environment
- Ability to learn and adapt to new tools and methodologies.
- Ability to do multi-tasking & work on several high priority designs in parallel.
- Excellent problem solving skills
- Excellent communication and team work skills and good English is required
Job/Req. ID: 3049022
Location: Bangalore, KA
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