Broadcom is conducting an interview for the post of R&D Engineer IC Design.
Job duties and responsibilities:
- The prospective candidate will be an expert in SCAN and Memory BIST methodologies spanning from implementation to post-silicon bring-up and debug.
- He/She will be responsible for block-level and chip-level implementation of SCAN and MBIST including but not limited to pre-layout gate-level verification, timing analysis, post-layout gate-level verification with and without timing as well as pattern generation for post-silicon bring-up.
- He/She must be strong in DFT fundamentals and will have in-depth knowledge of compression-based SCAN and MBIST implementation tools like Mentor fastscan, Tessent MBIST etc.,
- He will have good fundamentals of timing-analysis using industry-standard tools like PTSI etc. and needs to interact with physical design team to clean-up constraints and achieve good quality timing-closure.
- He/She must be highly self-motivated with very little or no need of supervision.
- He/She must be a good team-player and willing to mentor and teach junior team members
Job/Req. ID: R015347
Location: Bangalore, KA
Job Category: VLSI Engineering
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