Cadence is conducting an interview for the post of Design Engineer I.
- BE/BTech/ME/MTech – Electrical / Electronics / VLSI with an experience as a design and verification engineer.
- Strong background on verification fundamentals, environment planning, test plan generation, environment development is a must.
- Design Verification experience verifying complex designs and leading projects from concept to verification closure.
- Strong hands-on System Verilog Assertion coding experience and Formal verification environment development is required.
- Exposure to cadence Jasper tool with apps like FPV, UNR, COV, CSR, C2RTL desirable.
- Team player with strong communication skills, and ability to work independently on the verification of a portion of the design.
- Prior experience in IP development teams would be an added advantage.
Job/Req. ID: R43973
Location: Bangalore, KA
Do you want Job alerts on your Phone? Join our WhatsApp/Telegram Group