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Job description:
Cadence is looking for experienced engineers in Noida.
This opportunity is for a Design Engineer at FED Group at Cadence. The Cadence FED Group will offer you a dynamic environment in which you will work with innovative R&D & Customer Engagement teams to develop EDA tools for advanced chip design platforms.
You will be a member of an expert R&D team creating technologies and products that enable DFT, Hierarchal Tests, and system-level testing of the most advanced custom digital and mixed-signal circuits built for communication, Automotive, IOT and AI markets. The requirement is for the industry leading DFT tool called Modus which is widely deployed & in production use on cutting edge semiconductor nodes across design houses. The candidate will also support RnD development tasks under Genus DFT Synthesis tool.
Job duties and responsibilities:
- Design and implement Hardware components for enabling Test and DFT.
- Write specification and code components in hardware description languages.
- Define requirements for block level and full-chip level infrastructure
- Create test plans for unit-level and chip-level validation
- Involved with pre-silicon verification at unit and system level to ensure functional correctness and performance of the overall solution.
- Debug failures and drive in-time resolution of bugs
- When needed, define and develop unit level test bench or a formal verification environment
Experience and technical skills required:
- Graduate/Post Graduate in EC/ECE/CS/EE
- 2-6 years of demonstrated experience in hardware design and verification space. Digital Design and SoCs
- In-depth knowledge of Verilog and System Verilog HDL or VHDL.
- Thorough understanding of Digital design concepts
- Experience with simulators and waveform debugging tools
- Experience on High speed design is a plus (PCIe, DDR3/4, SATA, HDMI, USB3.0, MIPI etc.).
- Understanding of verification standards and methodologies (SVA, UVM/OVM) is a plus.
- Exposure to complete digital design development cycle is a plus.
- Knowledge of state-of-the-art EDA tools (e.g., Cadence Xcelium…)
- Programming experience in languages common to the industry is a plus (e.g., C, C++, Shell scripting)
- Knowledge of scripting skills (Python preferred or Perl or TCL) is a plus.
- Knowledge of test and DFT (Scan insertion, Scan compression, test coverage analysis, ATPG pattern generation, simulation and debug, IEEE 1149.1, 1500 and 1687 standards) is a plus
- Experience in development of industry leading tools.
- Experience with quality and software processes
About Cadence:
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
The Cadence advantage:
- The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
- Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
- The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
- Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
- You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.
Job/Req. ID: R44731
Company: Cadence
Location: Noida, KA
Job Category: Electronics or Electrical or VLSI or Computer Science Engineering
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