Job description:
Micron Technology is conducting an interview for the post of DEG Layout Engineer.
Qualification / Requirements:
- Must have 0 to 3 years of experience in standard cell layout, analog, mixed-signal and custom digital block designs in advanced CMOS process.
- Should have expertise in multiple standard cell layout library developments.
- Should be able to perform standard cell and analog layout development and physical verification activities for complex designs as per provided specifications.
- Should have expertise in layout area and routing optimization, design rules, yield and reliability issues.
- Good understanding of layout fundamentals i.e., Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc.
- Should have adequate knowledge of schematics, interface with circuit designer and CAD team.
- Understanding layout effects on the circuit such as speed, capacitance, power, and area etc.,
- Excellent in problem-solving skills in solving area, power, performance, and physical verification of custom layout.
- Experience with Cadence tools including Virtuoso schematic editor Virtuoso layout L, XL & Verification tools like Mentor Calibre- Proficient in Device Matching, Parasitic Analysis, Electron Migration, and Isolation Techniques.
- Should have leadership qualities and able to do multi-tasking as required.
- Should be able to work in a team environment and able to guide and provide technical support to the fellow team members.
- Self-motivated, hardworking, goal-oriented and excellent verbal and written communication skills.
- Knowledge of Skill coding and layout automation is a plus.
Education:
B.E or MTech in Electronic/VLSI Engineering or equivalent
Job/Req. ID: JR45238
Company: Micron Technology
Location: Hyderabad, Telangana
Job Category: VLSI Engineering
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