Hardware Engineer (JR1978791) | NVIDIA Job | Bangalore, KA

February 10, 2024

Job description:

NVIDIA is seeking passionate, highly motivated and innovative verification engineers to be part of its Automotive and Graphic team. As part of these teams, you would be working on project that will contribute to next generation visual computing and automotive systems. You will get to work on high performance CPU and Memory sub-systems, Graphic processing units, NOC based Interconnect Fabric, High speed IO’s etc.

Job duties and responsibilities:

You will be responsible to make architectural trade-offs based on feature/performance/power requirements, analyze system implications, come up with the micro-architecture, implement RTL, drive the verification, close timing, and support silicon validation.
Develop test plans, tests and verification infrastructure for complex IP’s/sub-system/SOC’s.
Create verification environment using UVM methodology.
Create reusable bus functional models, monitors, checkers and scoreboards.
Drive functional coverage driven verification closure.
Develop and enhance timing analysis/signoff work flow from frontend (pre-layout) to backend (post-layout) at both chip and block level.
Chip level Integration, physically partitioning and floor planning.
Develop custom timing scripts using tcl/primetime for clock skew analysis, special circuits such as clock dividers, core logic <-> IO macros interfaces such as PCI-E, Frame-Buffer/Memory, HDMI, etc.
Work with architects, designers and post-silicon teams.

Qualifications and experience required:

BTech/MTech with 2+ years of experience in micro-architecture, RTL development of complex designs.
Possess strong digital design fundamentals.
Preferably have a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor planning, ECO, bring up and lab debug is a prerequisite for this role.
If you have experience in at least a few of the following domains, we will have an excellent match for our needs:
- CPU, Memory controller, Bus Interconnect
- High Speed IO controller (UFS/PCIE/ XUSB)
- 10G Ethernet MAC and (or) Switch
- Graphics Processing Unit (GPU Design & Verification)
- Standard Bus protocols (AXI/APB)
- BOOT and Power management features for complex SOC’s
- System functions like safety, security, virtualization and sensor processing
- FPGA Prototype with prior experience in HAP
- Good debugging and analytical skills.
Good interpersonal skills and ability to work as an excellent teammate
Excellent communication skills to collaborate with cross-cultural teams and work in a matrix organization