Physical Design Engineer, Full-Chip Implementation | Google Job | Bangalore, KA

Job description:

Google is looking for a Physical Design Engineer In Bangalore.

Job duties and responsibilities:

  • Oversee full-chip physical implementation for SOC (System-on-Chip).
  • Develop all aspects of ASIC RTL-to-GDS implementation for designs focused on Power, Performance, and Area (PPA).
  • Define and implement innovative strategies to enhance Performance and Power efficiency.
  • Collaborate with cross-functional teams to ensure the delivery of high-quality results.

Minimum qualifications:

  • Bachelor’s degree in Electrical Engineering or equivalent practical experience.
  • 2 years of experience in physical design.
  • Experience in floor-planning or block integration.
  • Familiarity with ASIC design flows and methodologies of physical design.

Preferred qualifications:

  • Master’s degree in Electrical Engineering or equivalent practical experience.
  • Experience in low-power design implementation (e.g., UPF, multi-voltage domains, power gating).
  • Proficiency in one or more synthesis/PnR tools (e.g., Genus, Innovus, Design Compiler, Fusion Compiler.

Job/Req. ID: N/A

Company: Google

Location: Bangalore, KA

Job category: VLSI Engineering

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