Job description:
AMD is hiring for the post of DFT- SMTS Silicon Design Engineer.
As a valued member of the Radeon Technologies Group, you’ll play a pivotal role in realizing cutting-edge designs. Joining the front-end design/integration team, you’ll collaborate closely with architecture, IP design, Physical Design teams, and product engineers to achieve first-pass silicon success.
The Ideal Candidate: The successful candidate will collaborate with senior silicon design engineers, demonstrating exceptional attention to detail, accuracy, along with effective communication and problem-solving skills.
Job duties and responsibilities:
- Implement and verify DFT architecture and features.
- Perform scan insertion and ATPG pattern generation.
- Verify ATPG patterns through gate-level simulation.
- Analyze test coverage and assess methods for reducing test costs.
- Provide post-silicon support to ensure successful product bring-up and enhance yield learning.
Preferred experience:
- Familiarity with Design for Test (DFT) methodologies and DFT verification (e.g., IEEE1500, JTAG 1149.x, Scan, memory BIST, etc.).
- Proficiency with Mentor TestKompress and/or Synopsys TetraMAX/DFTMAX.
- Experience using VCS simulation tool, Perl/Shell scripting, and Verilog RTL design.
Academic credentials:
- Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering.
Job/Req. ID: 47155
Company: AMD
Location: Bangalore, KA
Job Category: VLSI or Electrical or Computer Engineering
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