Job description:
Texas Instruments is conducting an interview for the post of Analog/RF Layout Engineer.
Job duties and responsibilities:
- Running all physical verifications as DRC/LVS/DFM and parasitic extractions to achieve high quality layout deliveries
- Be responsible for cell level, block level, top level floor planning, layout and integration
- Work with circuit design team to deliver quality layout design
Qualifications and Experience required:
- 2-3 years of mixed-signal layout with deep sub-micron (<= 40nm) CMOS processes
- Design physical layout of complex, high speed, low power CMOS circuits in deep sub-micron processes
- Additional RF layout & FinFET experience is a plus
- Familiar with Cadence Virtuoso and VXL, understanding of CMOS devices
- Be capable to learn new design rules for new processes
- SKILL programming knowledge is a plus
- Must be a team player with good verbal communication skills, self-motivated, detail oriented, work with multiple functional teams and with good engineering practices
Job/Req. ID: N/A
Company: Texas Instruments
Location: Bengaluru, KA
Job Category: VLSI Engineering
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