Design Verification Engineer, Multimedia | Google | Bangalore, KA

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Job description:

Google is conducting an interview for the post of Design Verification Engineer, Multimedia.

About the job:

Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

As a Design Verification Engineer, you will develop technologies that change how users connect, explore, and interact with information. In this role, you will develop new products.

Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.

Job duties and responsibilities:

  • Plan the verification of complex multimedia digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using System Verilog and UVM.
  • Identify and write types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Identify verification gaps and show progress towards tape-out.

Minimum qualifications:

  • 3 years of experience in design verification.
  • Experience with Systemverilog, Universal Verification Methodology (UVM), and test planning.
  • Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:

  • Master’s degree or PhD with 5 years of experience in design verification.
  • Experience with performance verification of ASICs and ASIC components.
  • Experience with ASIC standard interfaces and memory system architecture.
  • Experience with verification techniques, System Verilog Assertions (SVA), and assertion-based verification.
  • Experience with System-On-Chip Design Verification.
  • Experience with Intellectual Property Design Verification.

Job/Req. ID: N/A

Company: Google

LocationBangalore, KA

Job CategoryVLSI Engineering

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