Job description:
Applications are invited from suitable candidates for a Junior Research Fellow (JRF) position to work on the following project sponsored by Science and Engineering Research Board (SERB) having No. SRG/2020/000202 under the supervision of Dr. Chetan Kumar Vudadha, Assistant Professor, Department of Electrical and Electronics Engineering, BITS-Pilani, Hyderabad campus.
Title of the project: A Novel 2:1 Multiplexer based Approach to Implement Ternary Logic Circuits
Duration of the project: 6 Months
Project position: Junior Research Fellow (JRF)
Number of Positions: One
Fellowship amount: 31,000/- per month
Eligibility requirements:
M.E. / M. Tech (in VLSI Design/Microelectronics or allied areas).
[Should have been selected for Post Graduate (Masters) program through one of the following]
a. Selection through CSIR-UGC NET or GATE (Should have qualified in the Past)
b. Selection process through national level examinations conducted by central Government Departments and their Agencies and Institutions.
Desired Experience:
Prior exposure/experience in SPICE level coding and simulation of VLSI circuits is desirable.
Job/Req. ID: N/A
Institution: BITS, Pilani, Hyderabad Campus
Location: Hyderabad
Job Category: VLSI or Microelectronics Engineering
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