Job description:
Intel is conducting an interview for the post of Library QA Engineer.
Job duties and responsibilities:
- Validation of PDK libraries is the primary job. PDK libraries include primitive and analog device pcells/pycells.
- Validation by creating testcases and physical verification, extraction with multiple EDA tools Cadence/Synopsis/Siemens, Automating validation flows/testcase generation through Python, Skill and TCL are the primary responsibility.
- Following up on issues with development teams and interacting with multiple PDK stake holders etc is part of job.
Qualifications, skills and experience required:
- Candidate should have good knowledge about PDK, Pcells/Pycells, Front End and Back End custom design methodology with Cadence virtuoso/Synopsys Custom Design Platform.
- Must have knowledge on synopsis, siemens, cadence physical verification flows and DRC/density error fixes.
- Candidate should be familiar with automation skills primarily – Skill, TCL and Python.
- Good in written and verbal communication skills and flexibility to work with across geo partners.
- Experience BE, B. Tech, MTech in VLSI domain with 1-3 Years of relevant experience
Job/Req. ID: JR0238709
Company: Intel
Location: Bangalore, KA
Job Category: VLSI Engineer
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