Job description:
Google is conducting an interview for the post of ASIC RTL IP Design Engineer.
About the job:
Our computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
Job duties and responsibilities:
- Plan tasks, present code and design reviews, and develop code for features in the IP.
- Collaborate with architecture teams and develop implementation strategies to meet quality and schedule for the IP.
- Work with cross-functional teams to make design decisions and represent project status throughout the development process.
Qualifications and experience required:
- Bachelor’s degree in electrical engineering, computer science, or equivalent practical experience
- 4 years of experience in IP or sub-system level RTL Design
- Experience with Verilog or System Verilog language
- Experience with micro architecture design and system design
Preferred qualifications:
- Experience with various quality checks performed at front-end (e.g., Lint, CDC/RDC, Synthesis, LEC, etc.)
- Experience in micro-architecture and coding in memory compression, interconnects, coherence, or cache
- Experience with chip design flow and cross-domain
Job/Req. ID: N/A
Company: Google
Location: Bangalore, KA
Job Category: VLSI Engineering
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