Job description:
HCLTech is looking for a Memory Design Trainer, someone who can guide on the following topics:
- Self-time memories
- Read and write assist in advanced nodes
- Design constraints for layout
- Pipeline memories
- Redundancy in memories
- Scan chain insertion in memories
- ESPCV Cdl vs Verilog
- Analysis of race margins in memories
- Sense Amp Analysis
- Bit Cell Analysis
- Well verse with Char and validation flow
P.S. : Tools knowledge is a must skill here.
Job/Req. ID: N/A
Company: HCL Tech
Location: Bangalore, KA
Job Category: VLSI Engineering
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Aspirants, with the relevant skills set can share their resume with me at [email protected]
