Verification Engineer (35139) | AMD Jobs | Hyderabad, Telangana

October 23, 2023

Job description:

AMD is hiring Verification Engineers in Hyderabad.

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s Control Fabric Sub System, resulting in no bugs in the final design.

The person:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

Job duties and responsibilities:

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues 
Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

Qualifications and experience required:

Bachelors or Masters degree in computer engineering/Electrical Engineering
Proficient in IP level ASIC verification and Boot flows.
Proficient in debugging firmware and RTL code using simulation tools 
Proficient in using UVM testbenches and working in Linux and Windows environments
Experienced with Verilog, System Verilog, C, and C++  
Developing UVM based verification frameworks and testbenches, processes and flows
Automating workflows in a distributed compute environment.  
Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
Strong background in the C++ language, preferably on Linux with exposure to Windows platform
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
Good working knowledge of SystemC and TLM with some related experience.  
Scripting language experience: Perl, Ruby, Makefile, shell preferred.  
Exposure to leadership or mentorship is an asset
Desirable assets with prior exposure to video codec system or other multimedia solutions.