Analog Layout Engineer FY24 (R238864) | Analog Devices | Bangalore, KA

February 28, 2024

Job description:

Analog Devices is looking for a New College Graduate based in Bangalore, India.

Job duties and responsibilities:

The successful candidate will be working as a Analog Layout Engineer for mixed signal ICs focused on Battery Management Systems (BMS) and wireless Battery Management Systems (wBMS). The successful candidate gets involved in complete product development life cycle starting with initial scheduling, resource allocation, area estimation, floor-plan development, Pad ring decision, IP layout design, integration, physical verification, Database Transfer, JDV review and post-silicon support.

The successful candidate will be learning and responsible for:

Conception and definition of innovative and efficient test planning for mixed-signal ICs in close collaboration with our design teams and Design for Test Department
Design and development of both software and hardware for our state-of-the-art mixed-signal automated test systems (ATE)
Drive technical innovation in the department and provide a hands-on leadership on New Product Introductions w.r.t. Test Engineering
Support Design verification and silicon characterization in co-operation with design team and product engineering
Implementation, correlation, and release of a reliable test solution at our subcontractors and support of mass production ramp
Perform Test time reduction, yield improvement, ATE to Bench Correlation, GRR among other test engineering activities.
Learn to develop Automation for various test platforms.
Creation and review of documentation, implementation of development processes as required.
Understanding of various complex lab instruments and get chance to work with them.

Qualification and required skill sets:

B Tech/ Master’s degree in electrical or electronic engineering
Candidate must have strong leadership, strong interpersonal, technical & communication skills.
Good academic knowledge in Basic Electronics and Circuit designing is essential.
Knowledge of semiconductor fundamentals and manufacturing process
Good knowledge of ADC’s, DAC’s , LDO’s, Bandgap’s, Oscillator operation
Excellent analytical, problem solving, debugging skills & interpretation skills.
Programming skills is a plus
The successful candidate will be learning and responsible for
The knowledge of analog and mixed signal layout techniques and experience on Cadence Layout tools (Virtuoso) and Mentor Graphics verification systems (Calibre).
To complete tasks with minimum supervision and be comfortable working directly with circuit design engineers.
Layout/physical design of various circuit types is required: i.e. ADCs, DACs, LDOs, PLLs, VCOs, amplifiers, power switches, etc.
Common circuit layout practices such as: matching techniques, ESD/Latchup mitigation techniques, circuit parasitic extraction & reduction, VXL compliance etc.
Block floorplan, subsystem & chip level development. Physical verification flow (LVS, DRC, Density, Extraction, EM).
Strong collaboration with Analog Designers to solve challenging problems.
Develop schedule and monitor progress.
Develop and continuously improve layout practices and procedures, knowledge share with community.
Creation and review of documentation, implementation of development processes as required.