Fall 2023 DRAM Controller Internship – Timing Design Engineer Co-Op/ Intern | AMD | Santa Clara, California

Job description:

AMD is conducting an internship for Engineers.

ONSITE: This is an onsite position – the Intern/Co-op is required to relocate if necessary and work full-time (40 hours) from the Santa Clara office.

Program Term:

AMD is looking for candidates for the Fall 2023 term

Fall: Start Date August 21st, September 11th or September 25th, 2023 – December 15, 2023

Job duties and responsibilities:

  • Learning about Semiconductor Design life cycles from Concept to Tape Out
  • Part of the DRAM Controller block, working on real features for a project with a hard deadline
  • Using your Computer Architecture, Verilog AND Object Oriented programming knowledge to dig into our testbench and fix bugs, support new features
  • This is primarily a role within the Design Verification team

Key responsibilities:

  • Synthesize UMC IP using Synopsys tools and work with the micro-architects to ensure the design components meet the project’s area, power, and performance goals
  • Provide feedback to RTL team to resolve timing, power, area, LINT, DFT, and cross-clock-domain issues
  • Provide interface to integrate IP blocks into the SOC and resolve the same types of power, timing, area, and formal equivalence checking at the chip level
  • Analyze design power and devise improvements through architectural or flow optimizations
  • Work with UMC the architects and the chip floor planning team to develop a custom UMC topology

Skills required:

  • Strong Digital Logic Concepts
  • Strong understanding of computer architecture
  • Ability to Write and Understand intent of Verilog
  • Shell scripting and Perl/Python for automation, data collection and data analysis
  • Knowledge of Verification Concepts / Synthesis tools is a plus
  • Strong algorithmic thinking and Object Oriented Concepts
  • Must have good teamwork and interpersonal skills
  • Must be a self-starter, and able to independently drive tasks to completion

Qualifications required:

  • M.S. Students in EE or Computer Engineering
  • Strong Computer Architecture / Digital Design fundamentals
  • Self Starter – someone that will ask lots of questions and be genuinely interested in what they are building


  • Benefits compensation range $45.00-$50.00 hourly commensurate with experience
  • Healthcare coverage, dental and vision
  • Paid holidays
  • Relocation stipend
  • Education assistance for required Co-op/Intern course

Job/Req. ID: 2023-27996

Company: AMD

Location: Santa Clara, California

Job Type: International Jobs

Job Category: VLSI or Electronics or Computer Engineering

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