Job description:
Silicon Labs is conducting an interview for the post of Design Verification Engineer.
Job duties and responsibilities:
The position involves designing, developing, and deploying UVM based Test benches for multi-core, multi-threaded processor subsystems with emphasis on verifying and signing off performance and power along with functionality. The candidate should have knowledge on processor technology and AMBA AHB/AXI/APB along with high-speed interfaces like PCIe, USB, Ethernet, Mobile DDR and Quad/Octa-SPI and peripheral interfaces like SDIO, UART, I2S, I2C
Education and/or Experience:
B.Tech/M.Tech in ECE, EEE or CSE and 2 years of related experience.
Minimum Qualifications:
- Develop and signoff on test plans and test cases
- Strong knowledge of digital design and AMBA AHB/AXI/APB based SoC Architecture
strong knowledge of Verilog, System Verilog, UVM, C/C++ - Experience in usage of assertions, constrained random generation, functional/code coverage.
- Knowledge of scripting languages like Perl, Python, Tcl, shell to achieve automation of verification methodologies and flows
- Analytical debugging skills
- Working experience in Gate Level Simulations
- Experience in block level testbench development and debug
Preferred Qualifications:
- Knowledge of high-speed interfaces like USB, PCIe, Ethernet, Mobile DDR, Quad/Octa-SPI
- Knowledge of peripheral interfaces like SDIO, UART, I2S, I2C
- Knowledge of wireless technologies like WLAN, Bluetooth, ZigBee
- Exceptional problem-solving skills
- Good written and oral communication skills
Benefits & Perks:
Not only will you be joining a highly skilled and tight-knit team where every engineer makes a significant impact on the product; we also strive for good work/life balance and to make our environment welcoming and fun.
- Equity Rewards (RSUs)
- Insurance plans
- PF and NPS
Job/Req. ID: N/A
Company: Silicon Labs
Location: Hyderabad, Telangana
Job Category: Electronics or Computer Science or Electrical Engineering
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