Job description:
Synopsys is conducting an interview for the post of ASIC/Layout Design Engineer.
Qualifications and Experience required:
- Good understanding of electronics basic concepts and applications
- Good understanding of logic gates, flip flops, latches, multiplexers, level shifters, digital logics etc
- Knowledge of CMOS processes and issues in deep submicron process technologies
- CMOS design and layout design concepts (good understanding of lower node technologies is preferred)
- Familiarity with ASIC design flow and layout automation
- Prior knowledge of Standard cell is preferred
- Knowledge of EDA tools for layout/schematic design is preferred
- Basic programming languages C / Python / Perl / UNIX is mandatory (expertise will be added advantage)
- Out of box and innovative thinking capability
- Systematic approach to solve any problem
- Excellent written and verbal communication skills to work with other teams
- Should be able to adjust and work with people of all regions in the world
Job/Req. ID: 34204BR
Company: Synopsys
Location: Hyderabad, Telangana
Job Category: VLSI Engineering
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