Chip Design Verification Engineer | Edveon Technologies | Chennai, TN

Job description:

Edveon Technologies is conducting an interview for the post of Chip Design Verification Engineer.

Job duties and responsibilities:

  • To play the role of Verification engineer at the Block level, Chip level Functional verification.
  • Develop verification test plans from design specifications
  • Development of test environments using System Verilog and UVM verification methodologies.
  • Create multiple test cases as per the test plan and launch regressions.
  • Generate Code/Functional coverage, analyze coverage results and correlate with the test plan.
  • Working with the design team members to identify and quickly resolve problems with the design.
  • Communicate regularly with the team members to resolve issues and report status.
  • Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges.

Educational eligibility:

  • U.G – B.E/ B. Tech – ECE, EEE, CSE, IT – Upto 2022 Passed outs
  • P.G – M.E / M.TECH VLSI, Embedded, Power Electronics, Applied Electronics
  • Upto 2024 Passed outs

Note: Direct Applications are also invited.

Experience: 0 to 10 yrs (Fresher to Lead)

WFH only for 5+yrs experienced candidates

CTC: Based on Experience – Best in the Industry

No of Positions: 20

Location: Chennai,

Job/Req. ID: N/A

Company: Edveon Technologies

Location: Thalambur, Chennai, TN

Job category: ECE, EEE, CSE, IT, VLSI, Embedded, Power Electronics, Applied Electronics

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