Job description:
Synopsys is conducting an interview for the post of R&D Engineer.
Job duties and responsibilities:
- Candidate will be part of Static Verification tools over SpyGlass and VC Platform, with close working interaction expected with simulator (VCS) and formal tools (VC Formal)
- Responsible for designing, developing, troubleshooting the core engines
- Will be working closely with other teams both locally and globally
- Design and development of state of the art EDA tools involving development of new and innovative algorithms
Skills required:
- Fluent in C/C++ with work experience in data-structures and algorithms
- Excellent algorithm analysis skills and a good knowledge of data structures
- Familiarity with ASIC design flow and the EDA tools and methodologies used therein (preferable)
- Past working experience in EDA companies (highly preferable)
- Good knowledge of Tcl and Perl-based development on Unix (preferable)
- Good knowledge of Verilog, SystemVerilog & VHDL HDL (preferable)
- Ability to develop new architecture and good leadership skills
- Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success
- Quality focus – one who believes in quality and wants to make a difference
- Experience of production code development on Unix/Linux platforms
Job/Req. ID: 45287BR
Company: Synopsys
Location: Noida, UP
Job Category: VLSI Engineering
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