Job description:
Intel is conducting an interview for the post of FPGA/eASIC SW Validation Engineer.
Job duties and responsibilities:
- Researches, designs, develops, and optimizes software tools that enable the use of Field Programmable Gate Arrays (FPGA).
- Develops and optimizes compilers, flows, assemblers, models, tools, runtimes, and/or firmwares that are closely coupled to FPGA silicon, IP, and boards, while leveraging strong knowledge of FPGA hardware, logic design, board design, semiconductor devices, and chip layout.
- Designs, develops, and optimizes software abstractions and frameworks for acceleration with the FPGA for domains such as deep learning, DSP algorithms, or data analytics.
- Responds to customer/client requests or events as they occur.
Qualifications and experienced required:
Master’s/Bachelor’s Degree in Electronics/VLSI/Digital Design or other related disciplines, with 2+ years of experience in FPGA/ASIC/Structured-ASIC Domain covering
- RTL/FPGA/Digital Design using VHDL, Verilog or SystemVerilog.
- Experienced in FPGA Architecture/Tools and Static Timing Analysis
- Good Knowledge of FPGA Devices like Intel Agilex/ Stratix-10, Virtex-7 etc and FPGA Tools like Quartus, Vivado, Synplify, etc
- Good Experience in Simulation, Verification and Validation of FPGA Designs using tools like VCS, Modelsim, Xcelium, etc
- Knowledge of Shell/Perl/TCL/Python Scripting is desired
- Knowledge of ASIC/Structured ASIC Architecture and Flows will be an advantage
- Knowledge of Bus Protocols such as AXI/AMBA standards, high-speed Interfaces, Digital Signal Processing is an added advantage
Job/Req. ID: JR0236844
Company: Intel
Location: Bangalore, KA
Job Category: Electronics or VLSI or Computer Science Engineer
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