Google India is conducting an interview for the post of Physical Design Implementation Engineer.
About the job:
Google’s computational challenges are so big, complex and unique we can’t just purchase off-the-shelf hardware, we’ve got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google’s services. As a Hardware Engineer, you design and build the systems that are the heart of the world’s largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
As a Physical Design and Implementation Engineer, you will develop high performance hardware and software to enable Google’s continuous innovations in working with Application Specific Integrated Circuits (ASIC). You will work with Architects and Logic Designers to drive architectural feasibility studies, develop timing and area design goals and exploring RTL/design tradeoffs for physical design closure. You’ll also work with Verification and Software teams to understand and implement the design requirements for clocking management.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
- Implement PnR on 4nm or below technologies.
- Work with cross-functional teams to deliver the best quality of results.
- Manage block and full-chip level physical implementation and Quality of Results (QoR), including timing and area.
- Bachelor’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
- 3 years of experience in the physical design space.
- Experience delivering silicon.
- Experience in one or more synthesis/PnR tools (e.g., Genus, Innovus, DC, ICC).
- Master’s degree in Electrical Engineering or Computer Science.
- Experience in synthesis, PnR, sign-off convergence, including STA and sign-off optimizations.
- Experience in floor planning and block integration.
- Good working knowledge of PPA.
Job/Req. ID: N/A
Location: Bangalore, KA
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